Cortus Develops Next Generation High-End RISC-V CPU Core for HPC

Mauguio, France – June, 14th 2021: Cortus S.A.S., a leader in custom Systems-on-Chip (SoC) design services and integrated circuit (IC) provider, today announced that it is developing the high-performance Out-of-Order (OoO) processor core which is at the heart of the European eProcessor project. This project is lead by the Barcelona Supercomputing Center and is supported by Euro HPC funds.

With its international team of experts in advanced processor architecture and SoC design, Cortus brings leading technology innovations and industry leadership to this project. Cortus is recognized globally for its expertise in high-performance and ultra low power digital, mixed-signal, analog and RF design as well as processor architecture and design.

The processor contributed to the eProcessor project includes full cache coherency to enable large scale systems with a very large numbers of processors for a full scale supercomputer.

The processor implements the RISC-V 64-bit instruction set architecture. This offers numerous advantages compared to the common CISC architecture implemented by Intel and AMD. In RISC-V the large number of compiler visible register names combined with a load/store architecture and absence of memory to memory operations means many fewer memory operations are required. Exploiting the RISC-V Weak Memory Ordering model in conjunction with fewer memory operations allows dynamic execution optimizations which otherwise would not be possible within a Total Store Order approach. This allows a RISC-V processor to surpass Intel/AMD in Instructions Per Cycle (IPC). Further, optimized implementations of atomic memory operations in conjunction with the cache hierarchy improves the performance of multi-threaded applications such as those which run on a large scale HPC system.

Working with a strong European consortium enables Cortus to build a solid foundation of high-end processor cores for High Performance Computing (HPC). Other optimized versions will be derived for Data Server, Artificial Intelligence (AI) for Advanced driver-assistance systems (ADAS), central automotive CPUs and Mobile phones CPUs, to mention just a few.

Cortus offers a comprehensive ecosystem including IDE, compilers, assembler, linker, debugger and trace (supporting profiling and MC/DC for safety certifications) all of which have been carefully tested and integrated delivering significant value to Cortus’ strategic partners and customers.


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