Mid-Senior level or senior
- Define, design and simulate Analog circuit blocks such as Bandgap, LDOs and ADCs
- Modeling in VerilogA and/or SystemVerilog
- Full custom layout and physical verification
- Write documentation in accordance to company policy
- Create test/characterization plans to fully evaluate/debug IP
- Support characterization/debug in the lab/ATE environments
Qualifications and Experience
- MSc or PhD in Electrical/Electronic Engineering (or related field) and 3+ years of industry experience in Analog/RF IC design, or a BSc and 5+ years of industry experience.
- Strong background in device physics and semiconductor processing
- Experience with Cadence/Synopsys/Mentor tools
- Understanding of analog/RF circuit design techniques, simulator options and capabilities, and IC layout design techniques and verification methodologies
- You are a team player with critical attitude, a sense of initiative, and taking ownership and responsibility for your tasks.
- Fluency in English (oral and written)
- Greek or EU or Schengen area citizen or eligible of a valid Greek work permit
Nice to have
- Experience of carrying out analog/RF block characterization in the lab
- Experience with Matlab/Simulink
Job type: Full time
Location: Thessaloniki, Greece
Benefits of working at Thess IC
This position is intended for mid-level designers (higher levels will be considered for the ideal candidate) and carries an attractive salary. Collaboration and teamwork are highly valued, and accomplishments are duly celebrated.
THESS IC commits to a diverse and inclusive workplace and welcomes applications from candidates willing to work in an environment that allows initiative and requires flexibility. Open time-off policy paired with a profound respect for work/life balance.